1. Field of the Invention
This invention relates to a method of fabricating a semiconductor memory device, especially relates to a NAND-type flash memory with an SOI (Silicon-On-Insulator) substrate
2. Description of the Related Art
A NAND-type flash memory is known as one of electrically rewritable and non-volatile semiconductor memories (EEPROMs). The NAND-type flash memory has such a basic feature that the unit cell area is smaller than that of a NOR-type flash memory, and it is easy to make the capacity large. Further, data read or write of the cell array being performed by a page, it is possible to perform high-speed read and write.
Further miniaturization of a memory cell in accordance with progress of microfabrication technologies will bring some problems in the NAND-type flash memory such as: it becomes difficult to secure the breakdown voltage between cells; and the capacitive coupling noise between cells is increased. One approach to solve these problems is to use such a technology that the cell array is formed on an SOI (Silicon-On-Insulator) substrate. There have already been provided such SOI technologies (for example, refer to (1) Unexamined Japanese Patent Application Publication No. 07-094612, (2) Unexamined Japanese Patent Application Publication No.11-163303, and (3) Unexamined Japanese Patent Application Publication No. 2000-174241).